1. Field of the Invention
This invention relates to a low power transmission line terminator and more particularly to a non-linear transmission line terminator dissipating less power than linear terminators.
2. Description of the Prior Art
In the prior art, circuits such as complementary field effect transistor circuits (CFET) have transmission lines normally terminated by the input gate capacitance of the field effect transistors that are being driven. This gate capacitance is usually sufficiently low such that the transmission line acts as if it were terminated by an open circuit. With an open circuit, the power dissipated by the driving circuit is low but voltage reflections from the far end can cause field effect transistor (FET) substrate junctions to be forward biased. In an open circuit termination, a negative going voltage at the far end receiving terminal is doubled by the reflected wave. This negative reflected transition then travels back to the near end sending terminal. When it reaches the near end, the reflected wave can cause the sending terminal node to drop below ground potential causing the substrate junction to be forward biased. This can cause the complete circuit to be inoperative because of a phenomenon known as the "Silicon Controlled Rectifier" effect.
In order to avoid transmission lines reflection and resultant distorted wave forms, the prior art traditionally terminates a transmission line in its characteristic impedance. This classical solution is not adaptable to the semiconductor integrated structures described herein because of the excessive power dissipated by a resistive termination. Moreover, in integrated circuit technology, resistors tend to occupy excessive space on a semiconductor chip.